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Tamba Releases New Ultra-Low Latency Ethernet Cores for Xilinx UltraScale™   20nm FPGA - Lowest Latency Achieved on an FPGA Device. 




- Lowest Ethernet MAC/PCS latency ever achieved on an FPGA.

- Ultra small size, unmatched in the market place.

- Power consumption reduced by 66%.

- Incredible flexibility for reduced time to market.

- Available now for Xilinx UltraScale™ 20nM FPGA families.



Tamba Networks, a leading provider of IP

and services used to accelerate innovation

in chips and electronic systems, today

announced the availability of version 2 of its

Ethernet IP products for use on Xilinx, Inc.

(NASDAQ: XLNX) Virtex® UltraScale™ devices. 



This latest release delivers new performance enhancements that further increase the latency and size gap between existing IP available from other vendors.


Tamba products include:

Ethernet MAC & PCS at all speeds - 1G, 2.5G, 10G, 20G, 40G, 100G, 200G, 400Gbps.

Interlaken Cores - up to 1,000Gbps, up to 32 lanes, up to 28Gbps/lane

Channelized, multi-rate Ethernet cores which can switch rates in a running system.


Latency performance Xilinx Virtex® UltraScale™ -2 mid speed grade


  • 100GE  - under 100nS round trip latency for MAC and PCS.

  • 40GE   - under 63nS round trip latency for MAC and PCS.

  • 10GE   - under 42nS round trip latency for MAC and PCS.


 In recent years latency has become a key differentiator for financial markets firms attempting to reduce tick to trade latency, as well as for networking companies designing silicon or hardware Ethernet switches for data centers. As such low latency is one of the frequent key criteria for customers using Tamba IP, where in many cases, Tamba cores are approaching the theoretical minimum latency possible. In addition, when multiple cores need to be instantiated in a single device such as a silicon Ethernet switch, a client will benefit from huge gate count reduction by virtue of the extremely small size of the cores. Lastly the cores are incredibly flexible to allow ease of integration into a customer’s design, as well as allowing the cores to be latency optimized to any speed silicon fabric.


Compliance with Ethernet standards

Full MAC layer and Reconciliation sub-layer implementation compliant with IEEE802.3


Availability & Resources

Tamba Networks version 2 Ethernet cores are available now. Customers with a current maintenance agreement can access the new cores by contacting local sales. Available for any ASIC process node, and for several FPGA vendors. Tamba provides free evaluation cores, which potential customers can test, simulate or synthesize in their environment, before purchasing.


About Tamba IP products

The portfolio includes IP solutions consisting of a complete family of silicon-proven soft Ethernet and Interlaken cores. With a robust IP development methodology, extensive investment in quality, IP prototyping, and comprehensive technical support, Tamba enables designers to accelerate time-to-market and reduce integration risk, with performance that is absolutely unmatched in the marketplace. Learn more at


About Tamba Networks

Tamba Networks, a developer of Low-Latency, low gate count Networking Solutions for ASICs, and FPGAs, is revolutionizing the design of next generation communications equipment with its Intellectual Property (IP) Cores. Learn more at



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