DFT- PRO Plus - A Comprehensive Package of DFT Tools
It offers an integrated DFT solution covering scan synthesis and ATPG, memory Built-In Self-Test (BIST) synthesis and boundary scan (BSD) synthesis. The corresponding tools generate RTL blocks that fit seamlessly into an existing synthesis flow. This gives the user the freedom to choose any commercially available logic and scan synthesis tools and enables a one-pass RTL to GDSII synthesis flow. It also eases overall design floor planning.

VirtualScan - Tool Suite for Virtual Scan Synthesis and ATPG
It is SynTest's solution to combat this increase in test data volume and test cycle volume. With VirtualScan™ an extremely large number of short scan chains within the SOC can be virtually accessed from outside the chip with a limited number of pins assigned as scan pins.

TurboBIST - Built-in Self-Test
This family of products includes tools for logic (TurboBIST™ - Logic) and memory (TurboBIST™ - Memory) (SRAM, ROM, DRAM and CAM) built-in self-test. These tools synthesize the BIST logic surrounding functional logic and memory blocks, including IP cores from third party suppliers, and automatically generate the test patterns needed to provide very high fault coverage testing of complete complex system-on-silicon chips.