Aldec-Aldec, Inc., a leader in mixed RTL simulation and verification, announces support for the VHDL IEEE 1076™-2008 standard. 

Alvand
- Faraday Selects Alvand Technologies AFE (Analog Front End) IP
 to Support Next Generation Wireless Applications.

 
Calypto® Design Systems Inc., the leader in sequential analysis technology, today announcedthat the Semiconductor Technology Academic Research Center (STARC) has adopted Calypto’s PowerPro MG product for their STARCAD-CEL Version 4.0 design flow

 

 

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Events » DAC 2010

 

DAC 2010 - 47th Annual Design Automation Conference

Dates: June 14 - June 16
Location: Anaheim, CA, USA

You are cordially invited to visit AST & Aldec at the DAC2010.

Our EDA Director Uri Farkash will be waiting for you in Booth #1373.

Join Aldec as we Celebrate 25 Years. Aldec products are the choice of 30,000 plus engineers and we are pleased to announce SystemVerilog OVM/VMM/UVM methodology support, in our leading simulator Riviera-PRO™ at DAC.  We invite you to register to attend technical sessions debuting OVM/VMM/UVM System-level Simulation, Assertion-based Verification, SystemVerilog, HDL Design Rule Checking, Unified Code and Functional Coverage, Hardware Emulation (SCE-MI) and DO-254 Compliance validation.

Visit Aldec & AST booth 1373 and learn more about Aldec performance products Active-HDL, Riviera-PRO, ALINT, HES and DO-254 Compliance Tool Set.

For registration please press here: