AST is looking for highly experienced back-end engineers.

The ideal candidate should have at least five years of experience and deep knowledge with RTL to GDSII using Synopsys ICC flow including Geometrical and Verification (floor plan, LVS/DRC…), deep knowledge in timing and timing closure throughout the entire flow: Synthesis, Placement, CTS, Routing, MCMM, ECO’s, ERC, SI etc.

-> DFT is a big advantage

-> Experience in 65nm and below processes is a big advantage.

-> Ability to lead a team

-> Good knowledge in scripting

Please send your CV to: careers@ast.co.il